Datasheet

367
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Notes: 1. t
WLRH
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits commands.
2. t
WLRH_CE
is valid for the Chip Erase command.
28.7 Serial Downloading
Both the Flash and EEPROM memory arrays can be programmed using a serial programming bus while RESET
is pulled to GND. The serial programming interface consists of pins SCK, PDI (input) and PDO (output). After
RESET
is set low, the Programming Enable instruction needs to be executed first before program/erase
operations can be executed. NOTE, in
Table 28-14 on page 368, the pin mapping for serial programming is listed.
Not all packages use the SPI pins dedicated for the internal Serial Peripheral Interface - SPI.
t
DVXH
Data and Control Valid before XTAL1 High 67
ns
t
XLXH
XTAL1 Low to XTAL1 High 200
t
XHXL
XTAL1 Pulse Width High 150
t
XLDX
Data and Control Hold after XTAL1 Low 67
t
XLWL
XTAL1 Low to WR Low 0
t
XLPH
XTAL1 Low to PAGEL high 0
t
PLXH
PAGEL low to XTAL1 high 150
t
BVPH
BS1 Valid before PAGEL High 67
t
PHPL
PAGEL Pulse Width High 150
t
PLBX
BS1 Hold after PAGEL Low 67
t
WLBX
BS2/1 Hold after WR Low 67
t
PLWL
PAGEL Low to WR Low 67
t
BVWL
BS2/1 Valid to WR Low 67
t
WLWH
WR Pulse Width Low 150
t
WLRL
WR Low to RDY/BSY Low 0 1 s
t
WLRH
WR Low to RDY/BSY High
(1)
3.7 4.5
ms
t
WLRH_CE
WR Low to RDY/BSY High for Chip Erase
(2)
7.5 9
t
XLOL
XTAL1 Low to OE Low 0
ns
t
BVDV
BS1 Valid to DATA valid 0 250
t
OLDV
OE Low to DATA Valid 250
t
OHDZ
OE High to DATA Tri-stated 250
Table 28-13. Parallel Programming Characteristics, VCC = 5V ± 10%
Symbol Parameter Min. Typ. Max. Units