Datasheet

324
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Refer to the debugger documentation for further information on how to use this register.
25.8 Using the JTAG Programming Capabilities
Programming of AVR parts via JTAG is performed via the 4-pin JTAG port, TCK, TMS, TDI, and TDO. These
are the only pins that need to be controlled/observed to perform JTAG programming (in addition to power pins).
It is not required to apply 12V externally. The JTAGEN Fuse must be programmed and the JTD bit in the
MCUCR Register must be cleared to enable the JTAG Test Access Port.
The JTAG programming capability supports:
 Flash programming and verifying
 EEPROM programming and verifying
 Fuse programming and verifying
 Lock bit programming and verifying
The Lock bit security is exactly as in parallel programming mode. If the Lock bits LB1 or LB2 are programmed,
the OCDEN Fuse cannot be programmed unless first doing a chip erase. This is a security feature that ensures
no back-door exists for reading out the content of a secured device.
The details on programming through the JTAG interface and programming specific JTAG instructions are given
in the section “Programming via the JTAG Interface” on page 371.
25.9 Bibliography
For more information about general Boundary-scan, the following literature can be consulted:
 IEEE: IEEE Std. 1149.1-1990. IEEE Standard Test Access Port and Boundary-scan Architecture, IEEE,
1993.
 Colin Maunder: The Board Designers Guide to Testable Logic Circuits, Addison-Wesley, 1992.