Datasheet

323
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
The AVR Studio enables the user to fully control execution of programs on an AVR device with On-chip Debug
capability, AVR In-Circuit Emulator, or the built-in AVR Instruction Set Simulator. AVR Studio
®
supports source
level execution of Assembly programs assembled with Atmel Corporation’s AVR Assembler and C programs
compiled with third party vendors’ compilers.
AVR Studio runs under Microsoft
®
Windows
®
95/98/2000 and Microsoft Windows NT.
For a full description of the AVR Studio, refer to the AVR Studio User Guide. Only highlights are presented in
this document.
All necessary execution commands are available in AVR Studio, both on source level and on disassembly level.
The user can execute the program, single step through the code either by tracing into or stepping over
functions, step out of functions, place the cursor on a statement and execute until the statement is reached, stop
the execution, and reset the execution target. In addition, the user can have an unlimited number of code Break
Points (using the BREAK instruction) and up to two data memory Break Points, alternatively combined as a
mask (range) Break Point.
25.6 On-chip Debug Specific JTAG Instructions
The On-chip debug support is considered being private JTAG instructions, and distributed within Atmel and to
selected third party vendors only. Instruction opcodes are listed for reference.
25.6.1 PRIVATE0; 0x8
Private JTAG instruction for accessing On-chip debug system.
25.6.2 PRIVATE1; 0x9
Private JTAG instruction for accessing On-chip debug system.
25.6.3 PRIVATE2; 0xA
Private JTAG instruction for accessing On-chip debug system.
25.6.4 PRIVATE3; 0xB
Private JTAG instruction for accessing On-chip debug system.
25.7 On-chip Debug Related Register in I/O Memory
25.7.1 On-chip Debug Register – OCDR
The OCDR Register provides a communication channel from the running program in the microcontroller to the
debugger. The CPU can transfer a byte to the debugger by writing to this location. At the same time, an internal
flag; I/O Debug Register Dirty – IDRD – is set to indicate to the debugger that the register has been written.
When the CPU reads the OCDR Register the seven LSB will be from the OCDR Register, while the MSB is the
IDRD bit. The debugger clears the IDRD bit when it has read the information.
In some AVR devices, this register is shared with a standard I/O location. In this case, the OCDR Register can
only be accessed if the OCDEN Fuse is programmed, and the debugger enables access to the OCDR Register.
In all other cases, the standard I/O location is accessed.
Bit 7 6543210
MSB/IDRD LSB OCDR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value0 0000000