Datasheet

315
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Note: 1. MUX5 bit make part of ADCSRB register.
24.9.2 ADC Control and Status Register A – ADCSRA
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the ADC off while a
conversion is in progress, will terminate this conversion.
101000
N/A
ADC4 ADC0 10x
101001 ADC5 ADC0 10x
101010 ADC6 ADC0 10x
101011 ADC7 ADC0 10x
101100 ADC4 ADC1 10x
101101 ADC5 ADC1 10x
101110 ADC6 ADC1 10x
101111 ADC7 ADC1 10x
110000 ADC4 ADC0 40x
110001 ADC5 ADC0 40x
110010 ADC6 ADC0 40x
110011 ADC7 ADC0 40x
110100
N/A
ADC4 ADC1 40x
110101 ADC5 ADC1 40x
110110 ADC6 ADC1 40x
110111 ADC7 ADC1 40x
111000 ADC4 ADC0 200x
111001 ADC5 ADC0 200x
111010 ADC6 ADC0 200x
111011 ADC7 ADC0 200x
111100 ADC4 ADC1 200x
111101 ADC5 ADC1 200x
111110 ADC6 ADC1 200x
111111 ADC7 ADC1 200x
Table 24-4. Input Channel and Gain Selections
MUX5..0
(1)
Single Ended Input Positive Differential Input Negative Differential Input Gain
Bit 76543210
ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 ADCSRA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0