Datasheet

313
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
24.9 ADC Register Description
24.9.1 ADC Multiplexer Selection Register – ADMUX
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in the table. If these bits are changed during a
conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). The
internal voltage reference options may not be used if an external reference voltage is being applied to the AREF
pin.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to
ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the
ADC Data Register immediately, regardless of any ongoing conversions. For a complete description of this bit,
see “The ADC Data Register – ADCL and ADCH” on page 316.
• Bits 4:0 – MUX4:0: Analog Channel Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC. These bits also
select the gain for the differential channels as shown in the table. If these bits are changed during a conversion,
the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set).
Bit 76543210
REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 ADMUX
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Table 24-3. Voltage Reference Selections for ADC
REFS1 REFS0 Voltage Reference Selection
0 0 AREF, Internal V
REF
turned off
0 1 AV
CC
with external capacitor on AREF pin
1 0 Reserved
1 1 Internal 2.56V Voltage Reference with external capacitor on AREF pin
Table 24-4. Input Channel and Gain Selections
MUX5..0
(1)
Single Ended Input Positive Differential Input Negative Differential Input Gain
000000 ADC0
N/A
000001 ADC1
000010
N/A
000011
000100 ADC4
000101 ADC5
000110 ADC6
000111 ADC7