Datasheet

288
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
• Bit 6 - OVERFI - Overflow Error Interrupt Flag
Set by hardware when an overflow error occurs in an isochronous endpoint. An interrupt (EPINTx) is triggered
(if enabled).
See Section 22.15, page 278 for more details.
Shall be cleared by software. Setting by software has no effect.
• Bit 5 - UNDERFI - Flow Error Interrupt Flag
Set by hardware when an underflow error occurs in an isochronous endpoint. An interrupt (EPINTx) is triggered
(if enabled).
See Section 22.15, page 278 for more details.
Shall be cleared by software. Setting by software has no effect.
• Bit 4 - Reserved
The value read from these bits is always 0. Do not set these bits.
• Bits 3-2 - DTSEQ1:0 - Data Toggle Sequencing Flag
Set by hardware to indicate the PID data of the current bank:
00bData0
01bData1
1xbReserved
For OUT transfer, this value indicates the last data toggle received on the current bank.
For IN transfer, it indicates the Toggle that will be used for the next packet to be sent. This is not relative to the
current bank.
• Bits 1:0 - NBUSYBK1:0 - Busy Bank Flag
Set by hardware to indicate the number of busy bank.
For IN endpoint, it indicates the number of busy bank(s), filled by the user, ready for IN transfer.
For OUT endpoint, it indicates the number of busy bank(s) filled by OUT transaction from the host.
00bAll banks are free
01b1 busy bank
10b2 busy banks
11bReserved
• Bits 7:3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• Bit 2 - CTRLDIR - Control Direction (Flag, and bit for debug purpose)
Set by hardware after a SETUP packet, and gives the direction of the following packet:
Bit 76543 2 10
- - - - - CTRLDIR CURRBK1:0 UESTA1X
Read/WriteRRRRR R RR
Initial Value 0 0 0 0 0 0 0 0