Datasheet

287
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
• Bits 5:1 - Reserved
The value read from these bits is always 0. Do not set these bits.
• Bit 0 - EPDIR - Endpoint Direction Bit
Set to configure an IN direction for bulk, interrupt or isochronous endpoints.
Clear to configure an OUT direction for bulk, interrupt, isochronous or control endpoints.
• Bit 7 - Reserved
The value read from these bits is always 0. Do not set these bits.
• Bits 6-4 - EPSIZE2:0 - Endpoint Size Bits
Set this bit according to the endpoint size:
000b: 8 bytes100b: 128 bytes
001b: 16 bytes101b: 256 bytes
010b: 32 bytes110b: 512 bytes
011b: 64 bytes111b: Reserved. Do not use this configuration.
• Bits 3:2 - EPBK1:0 - Endpoint Bank Bits
Set this field according to the endpoint size:
00b: One bank
01b: Double bank
1xb: Reserved. Do not use this configuration.
• Bit 1 - ALLOC - Endpoint Allocation Bit
Set this bit to allocate the endpoint memory.
Clear to free the endpoint memory.
See “Endpoint Activation” on page 271 for more details.
• Bit 0 - Reserved
The value read from these bits is always 0. Do not set these bits.
• Bit 7 - CFGOK - Configuration Status Flag
Set by hardware when the endpoint X size parameter (EPSIZE) and the bank parametrization (EPBK) are
correct compared to the maximum FIFO capacity and the maximum number of allowed bank. This bit is updated
when the bit ALLOC is set.
If this bit is cleared, the user should reprogram the UECFG1X register with correct EPSIZE and EPBK values.
Bit 7 6543210
- EPSIZE2:0 EPBK1:0 ALLOC - UECFG1X
Read/Write R R/W R/W R/W R/W R/W R/W R
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
CFGOK OVERFI UNDERFI - DTSEQ1:0 NBUSYBK1:0 UESTA0X
Read/Write R R/W R/W R/W R R R R
Initial Value00000000