Datasheet

230
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Figure 20-8. Arbitration Between Two Masters
Note that arbitration is not allowed between:
 A REPEATED START condition and a data bit
 A STOP condition and a data bit
 A REPEATED START and a STOP condition
It is the user software’s responsibility to ensure that these illegal arbitration conditions never occur. This implies
that in multi-master systems, all data transfers must use the same composition of SLA+R/W and data packets.
In other words: All transmissions must contain the same number of data packets, otherwise the result of the
arbitration is undefined.
20.5 Overview of the TWI Module
The TWI module is comprised of several submodules, as shown in Figure 20-9 on page 231. All registers drawn
in a thick line are accessible through the AVR data bus.
SDA from
Master A
SDA from
Master B
SDA Line
Synchronized
SCL Line
START
Master A Loses
Arbitration, SDA
A
SDA