Datasheet

215
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Data bits are shifted out and latched in on opposite edges of the XCKn signal, ensuring sufficient time for data
signals to stabilize. The UCPOLn and UCPHAn functionality is summarized in the following table.
Note that changing the setting of any of these bits will corrupt all ongoing communication for both the Receiver
and Transmitter.
Figure 19-1. UCPHAn and UCPOLn data transfer timing diagrams.
19.4 Frame Formats
A serial frame for the MSPIM is defined to be one character of 8 data bits. The USART in MSPIM mode has two
valid frame formats:
 8-bit data with MSB first
 8-bit data with LSB first
A frame starts with the least or most significant data bit. Then the next data bits, up to a total of eight, are
succeeding, ending with the most or least significant bit accordingly. When a complete frame is transmitted, a
new frame can directly follow it, or the communication line can be set to an idle (high) state.
The UDORDn bit in UCSRnC sets the frame format used by the USART in MSPIM mode. The Receiver and
Transmitter use the same setting. Note that changing the setting of any of these bits will corrupt all ongoing
communication for both the Receiver and Transmitter.
16-bit data transfer can be achieved by writing two data bytes to UDRn. A UART transmit complete interrupt will
then signal that the 16-bit value has been shifted out.
19.4.1 USART MSPIM Initialization
The USART in MSPIM mode has to be initialized before any communication can take place. The initialization
process normally consists of setting the baud rate, setting master mode of operation (by setting DDR_XCKn to
one), setting frame format and enabling the Transmitter and the Receiver. Only the transmitter can operate
independently. For interrupt driven USART operation, the Global Interrupt Flag should be cleared (and thus
interrupts globally disabled) when doing the initialization.
Table 19-1. UCPOLn and UCPHAn Functionality
UCPOLn UCPHAn SPI Mode Leading Edge Trailing Edge
0 0 0 Sample (Rising) Setup (Falling)
0 1 1 Setup (Rising) Sample (Falling)
1 0 2 Sample (Falling) Setup (Rising)
1 1 3 Setup (Falling) Sample (Rising)
XCK
Data setup (TXD)
Data sample (RXD)
XCK
Data setup (TXD)
Data sample (RXD)
XCK
Data setup (TXD)
Data sample (RXD)
XCK
Data setup (TXD)
Data sample (RXD)
UCPOL=0 UCPOL=1
UCPHA=0
UCPHA=1