Datasheet

21
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
5.3.1 EEPROM Read/Write Access
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in Table 5-3 on page 23. A self-timing function, however, lets
the user software detect when the next byte can be written. If the user code contains instructions that write the
EEPROM, some precautions must be taken. In heavily filtered power supplies, V
CC
is likely to rise or fall slowly
on power-up/down. This causes the device for some period of time to run at a voltage lower than specified as
minimum for the clock frequency used. See “Preventing EEPROM Corruption” on page 25. for details on how to
avoid problems in these situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed. Refer to the
description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is executed.
When the EEPROM is written, the CPU is halted for two clock cycles before the next instruction is executed.
5.3.2 The EEPROM Address Register – EEARH and EEARL
• Bits 15..12 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 11..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 512Bytes/1K
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and E2_END. The initial
value of EEAR is undefined. A proper value must be written before the EEPROM may be accessed.
5.3.3 The EEPROM Data Register – EEDR
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the EEPROM in the
address given by the EEAR Register. For the EEPROM read operation, the EEDR contains the data read out
from the EEPROM at the address given by EEAR.
5.3.4 The EEPROM Control Register – EECR
Bit 1514131211 10 9 8
––––EEAR11EEAR10EEAR9EEAR8EEARH
EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL
76543 2 10
Read/WriteRRRRR/WR/WR/WR/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value0000X X XX
XXXXX X XX
Bit 76543210
MSB LSB EEDR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 765432 10
– – EEPM1 EEPM0 EERIE EEMPE EEPE EERE EECR
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 0 0 X X 0 0 X 0