Datasheet

178

ATmega16U4/32U4 [DATASHEET]

Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016

16.2.1 Timing Example

Figure 16-3 illustrates the modulator in action. In this example the Timer/Counter1 is set to operate in fast PWM

mode (non-inverted) and Timer/Counter0 uses CTC waveform mode with toggle Compare Output mode

(COMnx1:0 = 1).

Figure 16-3. Output Compare Modulator, Timing Diagram

In this example, Timer/Counter0 provides the carrier, while the modulating signal is generated by the Output

Compare unit C of the Timer/Counter1.

The resolution of the PWM signal (OC1C) is reduced by the modulation. The reduction factor is equal to the

number of system clock cycles of one period of the carrier (OC0A). In this example the resolution is reduced by

a factor of two. The reason for the reduction is illustrated in Figure 16-3 at the second and third period of the

PB7 output when PORTB7 equals zero. The period 2 high time is one cycle longer than the period 3 high time,

but the result on the PB7 output is equal in both periods.

1 2

OC0A

(CTC Mode)

OC1C

(FPWM Mode)

PB7

(PORTB7 = 0)

PB7

(PORTB7 = 1)

(Period)

clk

I/O