Datasheet

176
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
The dead time delay of all Timer/Counter4 channels are adjusted by the dead time value register, DT4. The
register consists of two fields, DT4H3..0 and DT4L3..0, one for each complementary output. Therefore a
different dead time delay can be adjusted for the rising edge of OC4x and the rising edge of OC4x
.
• Bits 7:4- DT4H3:DT4H0: Dead Time Value for OC4x Output
The dead time value for the OC1x output. The dead time delay is set as a number of the prescaled timer/counter
clocks. The minimum dead time is zero and the maximum dead time is the prescaled time/counter clock period
multiplied by 15.
• Bits 3:0- DT4L3:DT4L0: Dead Time Value for OC4x Output
The dead time value for the OC4x output. The dead time delay is set as a number of the prescaled timer/counter
clocks. The minimum dead time is zero and the maximum dead time is the prescaled time/counter clock period
multiplied by 15.