Datasheet

155
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Figure 15-14. Phase and Frequency Correct PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV4) is set each time the counter reaches BOTTOM. The Interrupt Flag
can be used to generate an interrupt each time the counter reaches the BOTTOM value.
In the Phase and Frequency Correct PWM mode, the compare unit allows generation of PWM waveforms on
the OC4x pins. Setting the COM4x1:0 bits to two will produce a non-inverted PWM and setting the COM4x1:0 to
three will produce an inverted PWM output. Setting the COM4A1:0 bits to one will enable complementary
Compare Output mode and produce both the non-inverted (OC4x) and inverted output (OC4x
). The actual
values will only be visible on the port pin if the data direction for the port pin is set as output. The PWM
waveform is generated by clearing (or setting) the Waveform Output (OCW4x) at the Compare Match between
OCR4x and TCNT4 when the counter increments, and setting (or clearing) the Waveform Output at Compare
Match when the counter decrements. The PWM frequency for the output when using the Phase and Frequency
Correct PWM can be calculated by the following equation:
The
N variable represents the number of steps in dual-slope operation. The value of N equals to the TOP value.
The extreme values for the OCR4C Register represent special cases when generating a PWM waveform output
in the Phase and Frequency Correct PWM mode. If the OCR4C is set equal to BOTTOM, the output will be
continuously low and if set equal to MAX the output will be continuously high for non-inverted PWM mode. For
inverted PWM the output will have the opposite logic values.
The general I/O port function is overridden by the Output Compare value (OC4x / OC4x
) from the Dead Time
Generator, if either of the COM4x1:0 bits are set and the Data Direction Register bits for the OC4X and OC4X
pins are set as an output. If the COM4x1:0 bits are cleared, the actual value from the port register will be visible
on the port pin. The configurations of the Output Compare Pins are described in the table below.
Table 15-3. Output Compare pin configurations in Phase and Frequency Correct PWM Mode
COM4x1 COM4x0 OC4x Pin OC4x Pin
0 0 Disconnected Disconnected
0 1 OC4x OC4x
1 0 Disconnected OC4x
1 1 Disconnected OC4x
TOVn Interrupt Flag Set
OCnx Interrupt Flag Set
1 2 3
TCNTn
Period
OCWnx
OCWnx
(COMnx = 2)
(COMnx = 3)
OCRnx Update
f
OCnxPCPWM
f
clkT4
N
-------------=