Datasheet

147
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
15.5 Dead Time Generator
The Dead Time Generator is provided for the Timer/Counter4 PWM output pairs to allow driving external power
control switches safely. The Dead Time Generator is a separate block that can be used to insert dead times
(non-overlapping times) for the Timer/Counter4 complementary output pairs OC4x and OC4x
when the PWM
mode is enabled and the COM4x1:0 bits are set to “01”. The sharing of tasks is as follows: the Waveform
Generator generates the Waveform Output (OCW4x) and the Dead Time Generator generates the non-
overlapping PWM output pair from the Waveform Output. Three Dead Time Generators are provided, one for
each PWM output. The non-overlap time is adjustable and the PWM output and it’s complementary output are
adjusted separately, and independently for both PWM outputs.
Figure 15-6. Output Compare Unit, Block Diagram
The Dead Time Generation is based on the 4-bit down counters that count the dead time, as shown in Figure
15-7. There is a dedicated prescaler in front of the Dead Time Generator that can divide the Timer/Counter4
clock (PCK or CK) by 1, 2, 4, or 8. This provides for large range of dead times that can be generated. The
prescaler is controlled by two control bits DTPS41..40. The block has also a rising and falling edge detector that
is used to start the dead time counting period. Depending on the edge, one of the transitions on the rising
edges, OC4x or OC4x
is delayed until the counter has counted to zero. The comparator is used to compare the
counter with zero and stop the dead time insertion when zero has been reached. The counter is loaded with a 4-
bit DT4H or DT4L value from DT4 I/O register, depending on the edge of the Waveform Output (OCW4x) when
the dead time insertion is started. The Output Compare Output are delayed by one timer clock cycle at minimum
from the Waveform Output when the Dead Time is adjusted to zero. The outputs OC4x and OC4x
are inverted,
if the PWM Inversion Mode bit PWM4X is set. This will also cause both outputs to be high during the dead time.
Figure 15-7. Dead Time Generator
The length of the counting period is user adjustable by selecting the dead time prescaler setting by using the
DTPS41:40 control bits, and selecting then the dead time value in I/O register DT4. The DT4 register consists of
two 4-bit fields, DT4H and DT4L that control the dead time periods of the PWM output and its' complementary
output separately in terms of the number of prescaled dead time generator clock cycles. Thus the rising edge of
OCnx
pin
WGMn0
Waveform Generator
top
FOCn
COMnx
bottom
PWMnx
OCWnx
Dead Time Generator
OCnx
pin
DTnH DTnL
DTPSn
CK OR PCK
CLOCK
OCnx
OCnx
CLOCK CONTROL
OCnx
OCnx
CK OR PCK
CLOCK
OCWnx
4-BIT COUNTER
COMPARATOR
DTnL
DTnH
DEAD TIME
PRE-SCALER
DTPSn
DTn I/O REGISTER
DATA BUS (8-bit)
TCCRnB REGISTER
PWMnX
PWMnX