Datasheet

118
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
The Input Capture unit is illustrated by the block diagram shown in Figure 14-3. The elements of the block
diagram that are not directly a part of the input capture unit are gray shaded. The small “n” in register and bit
names indicates the Timer/Counter number.
Figure 14-3. Input Capture Unit Block Diagram
Note: The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 ICP – not Timer/Counter3, 4, or 5.
When a change of the logic level (an event) occurs on the Input Capture Pin (ICPn), alternatively on the analog
Comparator output
(ACO), and this change confirms to the setting of the edge detector, a capture will be
triggered. When a capture is triggered, the 16-bit value of the counter (TCNTn) is written to the
Input Capture
Register
(ICRn). The Input Capture Flag (ICFn) is set at the same system clock as the TCNTn value is copied
into ICRn Register. If enabled (TICIEn = 1), the input capture flag generates an input capture interrupt. The ICFn
flag is automatically cleared when the interrupt is executed. Alternatively the ICFn flag can be cleared by
software by writing a logical one to its I/O bit location.
Reading the 16-bit value in the
Input Capture Register (ICRn) is done by first reading the low byte (ICRnL) and
then the high byte (ICRnH). When the low byte is read the high byte is copied into the high byte Temporary
Register (TEMP). When the CPU reads the ICRnH I/O location it will access the TEMP Register.
The ICRn Register can only be written when using a Waveform Generation mode that utilizes the ICRn Register
for defining the counter’s TOP value. In these cases the
Waveform Generation mode (WGMn3:0) bits must be
set before the TOP value can be written to the ICRn Register. When writing the ICRn Register the high byte
must be written to the ICRnH I/O location before the low byte is written to ICRnL.
For more information on how to access the 16-bit registers refer to “Accessing 16-bit Registers” on page 113.
14.5.1 Input Capture Trigger Source
The main trigger source for the input capture unit is the Input Capture Pin (ICPn). Timer/Counter1 can
alternatively use the analog comparator output as trigger source for the input capture unit. The Analog
Comparator is selected as trigger source by setting the
analog Comparator Input Capture (ACIC) bit in the
Analog Comparator Control and Status Register (ACSR). Be aware that changing trigger source can trigger a
capture. The input capture flag must therefore be cleared after the change.
ICFn (Int.Req.)
Analog
Comparator
WRITE
ICRn (16-bit Register)
ICRnH (8-bit)
Noise
Canceler
ICPn
Edge
Detector
TEMP (8-bit)
DATA BUS (8-bit)
ICRnL (8-bit)
TCNTn (16-bit Counter)
TCNTnH (8-bit) TCNTnL (8-bit)
ACIC* ICNC ICES
ACO*