Datasheet
106
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
The table shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase correct PWM mode.
Note: 1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Compare Match is
ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on page 101 for more details.
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATmega16U4/ATmega32U4 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting sequence of the
counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used as
shown in the table. Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear
Timer on Compare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see “Modes of
Operation” on page 98).
Notes: 1. MAX = 0xFF
2. BOTTOM = 0x00
Table 13-6. Compare Output Mode, Phase Correct PWM Mode
(1)
COM0A1 COM0A0 Description
0 0 Normal port operation, OC0B disconnected
0 1 Reserved
1 0
Clear OC0B on Compare Match when up-counting. Set OC0B on Compare
Match when down-counting.
1 1
Set OC0B on Compare Match when up-counting. Clear OC0B on Compare
Match when down-counting.
Table 13-7. Waveform Generation Mode Bit Description
Mode WGM2 WGM1 WGM0
Timer/Counter Mode of
Operation TOP
Update of
OCRx at
TOV Flag
Set on
(1)(2)
0 0 0 0 Normal 0xFF Immediate MAX
1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM
2 0 1 0 CTC OCRA Immediate MAX
3 0 1 1 Fast PWM 0xFF TOP MAX
4 1 0 0 Reserved – – –
5 1 0 1 PWM, Phase Correct OCRA TOP BOTTOM
6 1 1 0 Reserved – – –
7 1 1 1 Fast PWM OCRA TOP TOP