Datasheet

Value Description
00 The low level of INT1 generates an interrupt request.
01 Any logical change on INT1 generates an interrupt request.
10 The falling edge of INT1 generates an interrupt request.
11 The rising edge of INT1 generates an interrupt request.
Bits 1:0 – ISC0n: Interrupt Sense Control 0 [n = 1:0]
The External Interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the corresponding
interrupt mask are set. The level and edges on the external INT0 pin that activate the interrupt are defined
in table below. The value on the INT0 pin is sampled before detecting edges. If edge or toggle interrupt is
selected, pulses that last longer than one clock period will generate an interrupt. Shorter pulses are not
guaranteed to generate an interrupt. If low level interrupt is selected, the low level must be held until the
completion of the currently executing instruction to generate an interrupt.
Value Description
00 The low level of INT0 generates an interrupt request.
01 Any logical change on INT0 generates an interrupt request.
10 The falling edge of INT0 generates an interrupt request.
11 The rising edge of INT0 generates an interrupt request.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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