Datasheet

Mnemonic Operands Description Op Flags
#Clocks
AVR
LD Rd, X Load Indirect Rd ← (X) None 2
(1)
LD Rd, X+ Load Indirect and Post-Increment Rd
X
←
←
(X)
X + 1
None 2
(1)
LD Rd, -X Load Indirect and Pre-Decrement X
Rd
←
←
X - 1
(X)
None 2
(1)
LD Rd, Y Load Indirect Rd ← (Y) None 2
(1)
LD Rd, Y+ Load Indirect and Post-Increment Rd
Y
←
←
(Y)
Y + 1
None 2
(1)
LD Rd, -Y Load Indirect and Pre-Decrement Y
Rd
←
←
Y - 1
(Y)
None 2
(1)
LDD Rd, Y+q Load Indirect with Displacement Rd ← (Y + q) None 2
(1)
LD Rd, Z Load Indirect Rd ← (Z) None 2
(1)
LD Rd, Z+ Load Indirect and Post-Increment Rd
Z
←
←
(Z)
Z+1
None 2
(1)
LD Rd, -Z Load Indirect and Pre-Decrement Z
Rd
←
←
Z - 1
(Z)
None 2
(1)
LDD Rd, Z+q Load Indirect with Displacement Rd ← (Z + q) None 2
(1)
STS k, Rr Store Direct to Data Space (k) ← Rd None 2
(1)(2)
ST X, Rr Store Indirect (X) ← Rr None 1
(1)(2)
ST X+, Rr Store Indirect and Post-Increment (X)
X
←
←
Rr
X + 1
None 1
(1)(2)
ST -X, Rr Store Indirect and Pre-Decrement X
(X)
←
←
X - 1
Rr
None 2
(1)(2)
ST Y, Rr Store Indirect (Y) ← Rr None 2
(1)(2)
ST Y+, Rr Store Indirect and Post-Increment (Y)
Y
←
←
Rr
Y + 1
None 2
(1)(2)
ST -Y, Rr Store Indirect and Pre-Decrement Y
(Y)
←
←
Y - 1
Rr
None 2
(1)(2)
STD Y+q, Rr Store Indirect with Displacement (Y + q) ← Rr None 2
(1)(2)
ST Z, Rr Store Indirect (Z) ← Rr None 2
(1)(2)
ST Z+, Rr Store Indirect and Post-Increment (Z)
Z
←
←
Rr
Z + 1
None 2
(1)(2)
ST -Z, Rr Store Indirect and Pre-Decrement Z ← Z - 1 None 2
(1)(2)
STD Z+q,Rr Store Indirect with Displacement (Z + q) ← Rr None 2
(1)(2)
LPM Load Program Memory R0 ← (Z) None 3
LPM Rd, Z Load Program Memory Rd ← (Z) None 3
LPM Rd, Z+ Load Program Memory and Post-
Increment
Rd
Z
←
←
(Z)
Z + 1
None 3
SPM Store Program Memory (RAMPZ:Z) ← R1:R0 None
(4)
SPM Z+ Store Program Memory and Post-
Increment by 2
(RAMPZ:Z)
Z
←
←
R1:R0
Z + 2
None
(4)
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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