Datasheet

29.10. Parallel Programming Characteristics
Figure 29-5. Parallel programming timing, including some general timing requirements.
Data and control
(DATA, XA0/1, B
S1, BS2)
XTAL1
t
XHXL
t
WLWH
t
DVXH
t
XLDX
t
PLWL
t
WLRH
WR
RDY/BSY
PAGEL
t
PHPL
t
PLBX
t
BVPH
t
XLWL
t
WLBX
t
BVWL
WLRL
Figure 29-6. Parallel programming timing, loading sequence with timing requirements.
XTAL1
PAGEL
t
PLXH
XLXH
t
t
XLPH
ADDR0 (Low byte ) DATA (Low byte) DATA (High byte ) ADDR1 (Low byte )
DATA
BS1
XA0
XA1
LOAD ADDRES S
(LOW BYTE)
LOAD DATA
(LOW BYTE)
LOAD DATA
(HIGH BYTE)
LOAD DATA
LOAD ADDRES S
(LOW BYTE)
Note: The timing requirements shown in the figures above (that is, tDVXH, tXHXL, and tXLDX) also
apply to loading operation.
Figure 29-7. Parallel programming timing, reading sequence (within the same page) with timing
requirements.
XTAL1
OE
ADDR0 (Low byte ) DATA (Low byte)
DATA (High
byte )
ADDR1 (Low
byte )
DATA
BS1
XA0
XA1
LOAD ADDRES S
(LOW BYTE)
READ DATA
(LOW BYTE)
READ DATA
(HIGH BYTE)
LOAD ADDRES S
(LOW BYTE)
t
BVDV
t
OLDV
t
XLOL
t
OHDZ


Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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