Datasheet

Figure 8-5. Data Memory Map with 2048 byte internal data SRAM
(2048x8)
0x08FF
Figure 8-6. Data Memory Map with 4096 byte internal data SRAM
(4096x8)
0x10FF
8.3.1. Data Memory Access Times
The internal data SRAM access is performed in two clk
CPU
cycles as described in the following Figure.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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