Datasheet

22.11.1. ADC Multiplexer Selection Register
Name: ADMUX
Offset: 0x7C
Reset: 0x00
Property: R/W
Bit 7 6 5 4 3 2 1 0
REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:6 – REFSn: ADC Reference Selection Bits
These bits select the voltage reference for the ADC. If these bits are changed during a conversion, the
change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). The internal
voltage reference options may not be used if an external reference voltage is being applied to the AREF
pin.
Table 22-4. ADC Voltage Reference Selection
AREFEN ISRCEN REFS[1:0] Voltage Reference
Selection
1 0 00 External V
REF
on AREF
pin, Internal V
REF
is
switched off
1 0 01 AV
CC
with external
capacitor connected on
the AREF pin
0 0 01 AV
CC
(no external
capacitor connected on
the AREF pin)
1 0 10 Reserved
1 0 11 Internal 2.56V reference
voltage with external
capacitor connected on
the AREF pin
0 x 11 Internal 2.56V reference
voltage
If bits REFS1 and REFS0 are changed during a conversion, the change will not take effect until this
conversion is complete (it means while the ADIF bit in ADCSRA register is set). In case the internal Vref
is selected, it is turned ON as soon as an analog feature needed it is set.
Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one
to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will
affect the ADC Data Register immediately, regardless of any ongoing conversions. For a complete
description of this bit, see the ADCL and ADCH.
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
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