Datasheet

Figure 22-1. Analog to Digital Converter Block Schematic Operation
MUX2 MUX1 MUX0MUX3REFS 1 REFS0 ADLAR MUX4 ADPS2 ADPS 1 ADP S0ADIEADEN ADS C ADATE ADIF
ADMUX
ADCS RA
ADTS 2 ADTS1 ADTS0
ADASCR
- - -
ADCS RB
Edge
Detector
Source s
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
AMP 2-/ADC6
ADC7
AMP 1-/ADC8
AMP 1+/ADC9
ADC10
AMP 0-
AMP 0+
-
+
AMP 0CSR
-
+
AMP 1CSR
+
-
SAR
10
10
ADCH
ADCL
Coa rse/Fine DAC
10
Inte rna l 2.56V
Re fe re nce
REFS 0 REFS 1
AREF / ISRC
AVCC
PRESCALERCK
CKADC
CONTROL
CKADC
ADC CONVERS ION
COMP LETE IRQ
GND
Bandga p
ADATE
ADTS 3
Temp S e nsor
VCC/4
ISRC
AMP 2+
-
+
AMP 2CSR
AREFEN
ISRCEN
Curre nt
Source
ISRC
Related Links
Power Management and Sleep Modes on page 60
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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