Datasheet

20.11.9. CAN Bit Timing Register 2
Name: CANBT2
Offset: 0xE3
Reset: 0x0
Property: R/W
Bit 7 6 5 4 3 2 1 0
SJW1 SJW0 PRS2 PRS1 PRS0
Access
Reset 0 0 0 0 0
Bits 5, 6 – SJWn: Re-Synchronization Jump Width
To compensate for phase shifts between clock oscillators of different bus controllers, the controller must
re-synchronize on any relevant signal edge of the current transmission. The synchronization jump width
defines the maximum number of clock cycles. A bit period may be shortened or lengthened by a re-
synchronization.

sjw
= 
scl
× SJW[1:0]+1
Bits 1, 2, 3 – PRSn: Propagation Time Segment
This part of the bit time is used to compensate for the physical delay times within the network. It is twice
the sum of the signal propagation time on the bus line, the input comparator delay and the output driver
delay.

prs
= 
scl
× PRS[2:0]+1
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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