Datasheet

Value Description
0 No test mode
1 Test mode: intend for factory testing and not for customer use
Bit 1 – ENA/STB: Enable / Standby Mode
Because this bit is a command and is not immediately effective, the ENFG bit in CANGSTA register gives
the true state of the chosen mode.
Value Description
0 Standby mode: The on-going transmission (if exists) is normally terminated and the CAN
channel is frozen (the CONMOB bits of every MOb do not change). The transmitter
constantly provides a recessive level. In this mode, the receiver is not enabled but all the
registers and mailbox remain accessible from CPU. In this mode, the receiver is not enabled
but all the registers and mailbox remain accessible from CPU
Note: A standby mode applied during a reception may corrupt the on-going reception or set
the controller in a wrong state. The controller will restart correctly from this state if a software
reset (SWRES) is applied. If no reset is considered, a possible solution is to wait for a lake of
a receiver busy (RXBSY) before to enter in stand-by mode. The best solution is first to apply
an abort request command (ABRQ) and then wait for the lake of the receiver busy (RXBSY)
before to enter in stand-by mode. In any cases, this standby mode behavior has no effect on
the CAN bus integrity.
1 Enable mode: The CAN channel enters in enable mode once 11 recessive bits has been
read
Bit 0 – SWRES: Software Reset Request
This auto resettable bit only resets the CAN controller.
Value Description
0 No reset
1 Reset: this reset is “ORed” with the hardware reset
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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