Datasheet

18.16.2. PSC Synchro Configuration
Name: PSYNC
Offset: 0xB4
Reset: 0x0
Property: R/W
Bit 7 6 5 4 3 2 1 0
PSYNC2[1:0] PSYNC1[1:0] PSYNC0[1:0]
Access
Reset 0 0 0 0 0 0
Bits 0:1, 2:3, 4:5 – PSYNCn: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module n to the ADC
for synchronization.
Value Name Description
00 One Ramp mode Send signal on leading edge of PSCOUTnA (match with OCRnSA)
01 One Ramp mode Send signal on trailing edge of PSCOUTnA (match with OCRnRA or fault/
retrigger on part A)
10 One Ramp mode Send signal on leading edge of PSCOUTnB (match with OCRnSB)
11 One Ramp mode Send signal on trailing edge of PSCOUTnB (match with OCRnRB or fault/
retrigger on part B)
00 Centered mode Send signal on match with OCRnRA (during counting down of PSC). The
min value of OCRnRA must be 1
01 Centered mode Send signal on match with OCRnRA (during counting up of PSC). The
min value of OCRnRA must be 1
10 Centered mode no synchronization signal
11 Centered mode no synchronization signal
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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