Datasheet

Figure 18-15. Clock selection.
CLK
CLK
PSCn
CLK
PLL
I/O
CK
CK/4
CK/32
CK/256
PRESCALER
CK
PPREn1/0
00 01 10 11
PCLKSEL
1
0
PCLKSELn bit in PSC Control Register (PCTL) is used to select the clock source.
PPREn1/0 bits in PSC Control Register (PCTL) are used to select the divide factor of the clock.
Table 18-6. Output clock versus selection and prescaler.
PCLKSELn PPREn1 PPREn0 CLKPSCn output
0 0 0 CLK I/O
0 0 1 CLK I/O / 4
0 1 0 CLK I/O / 32
0 1 1 CLK I/O / 256
1 0 0 CLK PLL
1 0 1 CLK PLL / 4
1 1 0 CLK PLL / 32
1 1 1 CLK PLL / 256
18.15. Interrupts
This section describes the specifics of the interrupt handling as performed in Atmel
ATmega16M1/32M1/64M1.
18.15.1. Interrupt vector
PSC provides two interrupt vectors:
• PSC_End (End of Cycle): When enabled and when a match with POCR_RB occurs
• PSC_Fault (Fault Event): When enabled and when a PSC input detects a Fault event
18.15.2. PSC interrupt vectors in ATmega16M1/32M1/64M1
Table 18-7. PSC interrupt vectors.
Vector
no.
Program
address
Source Interrupt definition
- - - -
5 0x0004 PSC_Fault PSC fault event
Atmel ATmega16M1/32M1/64M1 [DATASHEET]
Atmel-8209F-ATmega16M1/32M1/64M1_Datasheet_Complete-10/2016
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