Datasheet

215
2503Q–AVR–02/11
ATmega32(L)
sions. For a complete description of this bit, see “The ADC Data Register – ADCL and ADCH” on
page 217.
• Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
These bits also select the gain for the differential channels. See Table 84 for details.
If these bits
are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSRA is set).
Table 84. Input Channel and Gain Selections
MUX4..0
Single Ended
Input
Positive Differential
Input
Negative Differential
Input Gain
00000 ADC0
00001 ADC1
00010 ADC2
00011 ADC3 N/A
00100 ADC4
00101 ADC5
00110 ADC6
00111 ADC7
01000
ADC0 ADC0
10x
01001
ADC1 ADC0
01010
ADC0 ADC0
200x
01011
ADC1 ADC0
01100
ADC2 ADC2
10x
01101
ADC3 ADC2
01110
ADC2 ADC2
200x
01111
ADC3 ADC2
10000
ADC0 ADC1
1x
10001
ADC1 ADC1
10010
N/A ADC2 ADC1
10011
ADC3 ADC1
10100
ADC4 ADC1
10101
ADC5 ADC1
10110
ADC6 ADC1
10111
ADC7 ADC1
11000
ADC0 ADC2
11001
ADC1 ADC2
11010
ADC2 ADC2
11011
ADC3 ADC2
11100
ADC4 ADC2