Datasheet

163
2503Q–AVR–02/11
ATmega32(L)
• Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPM0 setting.
If a mismatch is detected, the PE Flag in UCSRA will be set.
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of Stop Bits to be inserted by the Transmitter. The Receiver ignores
this setting.
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits (Char-
acter Size) in a frame the Receiver and Transmitter use.
Table 64. UPM Bits Settings
UPM1 UPM0 Parity Mode
0 0 Disabled
01Reserved
1 0 Enabled, Even Parity
1 1 Enabled, Odd Parity
Table 65. USBS Bit Settings
USBS Stop Bit(s)
01-bit
12-bit
Table 66. UCSZ Bits Settings
UCSZ2 UCSZ1 UCSZ0 Character Size
000 5-bit
001 6-bit
010 7-bit
011 8-bit
100 Reserved
101 Reserved
110 Reserved
111 9-bit