Datasheet

162
2503Q–AVR–02/11
ATmega32(L)
• Bit 1 – RXB8: Receive Data Bit 8
RXB8 is the ninth data bit of the received character when operating with serial frames with nine
data bits. Must be read before reading the low bits from UDR.
• Bit 0 – TXB8: Transmit Data Bit 8
TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames
with nine data bits. Must be written before writing the low bits to UDR.
USART Control and
Status Register C –
UCSRC
The UCSRC Register shares the same I/O location as the UBRRH Register. See the “Accessing
UBRRH/ UCSRC Registers” on page 158 section which describes how to access this register.
• Bit 7 – URSEL: Register Select
This bit selects between accessing the UCSRC or the UBRRH Register. It is read as one when
reading UCSRC. The URSEL must be one when writing the UCSRC.
• Bit 6 – UMSEL: USART Mode Select
This bit selects between Asynchronous and Synchronous mode of operation.
Bit 76543210
URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL UCSRC
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value10000110
Table 63. UMSEL Bit Settings
UMSEL Mode
0 Asynchronous Operation
1 Synchronous Operation