Datasheet

158
2503Q–AVR–02/11
ATmega32(L)
Accessing
UBRRH/ UCSRC
Registers
The UBRRH Register shares the same I/O location as the UCSRC Register. Therefore some
special consideration must be taken when accessing this I/O location.
Write Access When doing a write access of this I/O location, the high bit of the value written, the USART Reg-
ister Select (URSEL) bit, controls which one of the two registers that will be written. If URSEL is
zero during a write operation, the UBRRH value will be updated. If URSEL is one, the UCSRC
setting will be updated.
The following code examples show how to access the two registers.
Note: 1. See “About Code Examples” on page 7.
As the code examples illustrate, write accesses of the two registers are relatively unaffected of
the sharing of I/O location.
Assembly Code Example
(1)
...
; Set UBRRH to 2
ldi r16,0x02
out UBRRH,r16
...
; Set the USBS and the UCSZ1 bit to one, and
; the remaining bits to zero.
ldi r16,(1<<URSEL)|(1<<USBS)|(1<<UCSZ1)
out UCSRC,r16
...
C Code Example
(1)
...
/* Set UBRRH to 2 */
UBRRH = 0x02;
...
/* Set the USBS and the UCSZ1 bit to one, and */
/* the remaining bits to zero. */
UCSRC = (1<<URSEL)|(1<<USBS)|(1<<UCSZ1);
...