Datasheet
ATmega32A
2018 Microchip Technology Inc. Data Sheet Complete DS40002072A-page 93
17. 16-bit Timer/Counter1
17.1 Features
• True 16-bit Design (that is, allows 16-bit PWM)
• Two Independent Output Compare Units
• Double Buffered Output Compare Registers
• One Input Capture Unit
• Input Capture Noise Canceler
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Four Independent Interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
17.2 Overview
The 16-bit Timer/Counter unit allows accurate program execution timing (event management), wave generation,
and signal timing measurement. Most register and bit references in this section are written in general form. A lower
case "n" replaces the Timer/Counter number, and a lower case "x" replaces the output compare unit. However,
when using the register or bit defines in a program, the precise form must be used, that is, TCNT1 for accessing
Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 17-1. For the actual placement of I/O
pins, refer to Figure 1-1 on page 10. CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in
bold. The device-specific I/O Register and bit locations are listed in the “Register Description” on page 112.