Datasheet

ATmega32A

 2018 Microchip Technology Inc. Data Sheet Complete DS40002072A-page 80

Figure 15-4. Compare Match Output Unit, Schematic

The general I/O port function is overridden by the Output Compare (OC0) from the Waveform Generator if either of

the COM0[1:0] bits are set. However, the OC0 pin direction (input or output) is still controlled by the Data Direction

before the OC0 value is visible on the pin. The port override function is independent of the Waveform Generation

mode.

The design of the output compare pin logic allows initialization of the OC0 state before the output is enabled. Note

that some COM01:0 bit settings are reserved for certain modes of operation. Refer to “Register Description” on

page 86

15.6.1 Compare Output Mode and Waveform Generation

The Waveform Generator uses the COM0[1:0] bits differently in normal, CTC, and PWM modes. For all modes,

setting the COM0[1:0] = 0 tells the waveform generator that no action on the OC0 Register is to be performed on

the next compare match. For compare output actions in the non-PWM modes refer to Table 15-3 on page 87. For

fast PWM mode, refer to Table 15-4 on page 87, and for phase correct PWM refer to Table 15-5 on page 87.

A change of the COM0[1:0] bits state will have effect at the first compare match after the bits are written. For non-

PWM modes, the action can be forced to have immediate effect by using the FOC0 strobe bits.

15.7 Modes of Operation

The mode of operation, that is, the behavior of the Timer/Counter and the Output Compare pins, is defined by the

combination of the Waveform Generation mode (WGM01:0) and Compare Output mode (COM0[1:0]) bits. The

Compare Output mode bits do not affect the counting sequence, while the Waveform Generation mode bits do.

The COM0[1:0] bits control whether the PWM output generated should be inverted or not (inverted or non-inverted

PWM). For non-PWM modes the COM0[1:0] bits control whether the output should be set, cleared, or toggled at a

compare match. Refer to “Compare Match Output Unit” on page 79.

For detailed timing information refer to Figure 15-8, Figure 15-9, Figure 15-10 and Figure 15-11 in “Timer/Counter

Timing Diagrams” on page 84.

15.7.1 Normal Mode

The simplest mode of operation is the normal mode (WGM01:0 = 0). In this mode the counting direction is always

up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its maximum 8-

bit value (TOP = 0xFF) and then restarts from the bottom (0x00). In normal operation the Timer/Counter Overflow

PORT

DDR

OCn

Waveform

Generator

COMn1

COMn0

DATA BUS

FOCn

clk

I/O