Datasheet
ATmega32A
2018 Microchip Technology Inc. Data Sheet Complete DS40002072A-page 27
8.6 Register Description
8.6.1 EEARH and EEARL – EEPROM Address Register
• Bits [15:10] – Reserved Bits
These bits are reserved bits in the ATmega32A and will always read as zero.
• Bits [9:0] – EEAR9:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL – specify the EEPROM address in the 1024bytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 1023. The initial value of EEAR
is undefined. A proper value must be written before the EEPROM may be accessed.
8.6.2 EEDR – EEPROM Data Register
• Bits [7:0] – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the EEPROM in the
address given by the EEAR Register. For the EEPROM read operation, the EEDR contains the data read out from
the EEPROM at the address given by EEAR.
8.6.3 EECR – EEPROM Control Register
• Bits [7:4] – Reserved Bits
These bits are reserved bits in the ATmega32A and will always read as zero.
• Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing EERIE to zero dis-
ables the interrupt. The EEPROM Ready interrupt generates a constant interrupt when EEWE is cleared.
• Bit 2 – EEMWE: EEPROM Master Write Enable
The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written. When EEMWE is
set, setting EEWE within four clock cycles will write data to the EEPROM at the selected address If EEMWE is
zero, setting EEWE will have no effect. When EEMWE has been written to one by software, hardware clears the bit
to zero after four clock cycles. See the description of the EEWE bit for an EEPROM write procedure.
Bit 151413121110 9 8
– – – – – – EEAR9 EEAR8 EEARH
EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL
76543210
Read/Write RRRRRRR/WR/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 X
XXXXXXXX
Bit 76543210
MSB LSB EEDR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
– – – – EERIE EEMWE EEWE EERE EECR
Read/Write RRRRR/WR/WR/WR/W
Initial Value 0 0 0 0 0 0 X 0