Datasheet

1. Description
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to
be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega32A provides the following features: 32Kbytes of In-System Programmable Flash Program
memory with Read-While-Write capabilities, 1024bytes EEPROM, 2048bytes SRAM, 32 general purpose
I/O lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip Debugging
support and programming, three flexible Timer/Counters with compare modes, Internal and External
Interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit
ADC with optional differential input stage with programmable gain (TQFP package only), a programmable
Watchdog Timer with Internal Oscillator, an SPI serial port, and six software selectable power saving
modes. The Idle mode stops the CPU while allowing the USART, Two-wire interface, A/D Converter,
SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode
saves the register contents but freezes the Oscillator, disabling all other chip functions until the next
External Interrupt or Hardware Reset. In Power-save mode, the Asynchronous Timer continues to run,
allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise
Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize
switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running
while the rest of the device is sleeping. This allows very fast start-up combined with low-power
consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue
to run.
The device is manufactured using Atmel’s high density nonvolatile memory technology. The On-chip ISP
Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a
conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core.
The boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the Atmel ATmega32A is a powerful microcontroller that
provides a highly-flexible and cost-effective solution to many embedded control applications.
The Atmel AVR ATmega32A is supported with a full suite of program and system development tools
including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and
evaluation kits.
Atmel ATmega32A [DATASHEET]
Atmel-8155I-ATmega32A_Datasheet_Complete-08/2016
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