Datasheet

• If Timer/Counter2 is clocked asynchronously, i.e. the AS2 bit in ASSR is set, Timer/Counter2 will
run during sleep. The device can wake up from either Timer Overflow or Output Compare event
from Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable bits are set in TIMSK,
and the global interrupt enable bit in SREG is set.
If the asynchronous timer is NOT clocked asynchronously, Power-down mode is recommended instead of
Power-save mode because the contents of the registers in the asynchronous timer should be considered
undefined after wake-up in Power-save mode if AS2 is 0.
This sleep mode basically halts all clocks except clk
ASY
, allowing operation only of asynchronous
modules, including Timer/Counter2 if clocked asynchronously.
13.6. Standby Mode
When the SM2:0 bits are 110 and an external crystal/resonator clock option is selected, the SLEEP
instruction makes the MCU enter Standby mode. This mode is identical to Power-down with the exception
that the Oscillator is kept running. From Standby mode, the device wakes up in 6 clock cycles.
13.7. Extended Standby Mode
When the SM2:0 bits are 111 and an external crystal/resonator clock option is selected, the SLEEP
instruction makes the MCU enter Extended Standby mode. This mode is identical to Power-save mode
with the exception that the Oscillator is kept running. From Extended Standby mode, the device wakes up
in six clock cycles.
13.8. Minimizing Power Consumption
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep mode
should be selected so that as few as possible of the device’s functions are operating. All functions not
needed should be disabled. In particular, the following modules may need special consideration when
trying to achieve the lowest possible power consumption.
13.8.1. Analog-to-Digital Converter (ADC)
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be disabled
before entering any sleep mode. When the ADC is turned off and on again, the next conversion will be an
extended conversion. Refer to Analog-to-Digital Converter for details on ADC operation.
Related Links
ADC - Analog to Digital Converter on page 258
13.8.2. Analog Comparator
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering ADC
Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep modes, the Analog
Comparator is automatically disabled. However, if the Analog Comparator is set up to use the Internal
Voltage Reference as input, the Analog Comparator should be disabled in all sleep modes. Otherwise,
the Internal Voltage Reference will be enabled, independent of sleep mode. Refer to Analog Comparator
for details on how to configure the Analog Comparator.
Related Links
AC - Analog Comparator on page 253
Atmel ATmega32A [DATASHEET]
Atmel-8155I-ATmega32A_Datasheet_Complete-08/2016
49