Datasheet

Register is selected as Data Register. Note that the reset will be active as long as there is a logic 'one' in
the Reset Chain. The output from this chain is not latched.
The active states are:
• Shift-DR: The Reset Register is shifted by the TCK input.
29.10.3. PROG_ENABLE (0x4)
The AVR specific public JTAG instruction for enabling programming via the JTAG port. The 16-bit
Programming Enable Register is selected as data register. The active states are the following:
• Shift-DR: the programming enable signature is shifted into the data register.
• Update-DR: the programming enable signature is compared to the correct value, and Programming
mode is entered if the signature is valid.
29.10.4. PROG_COMMANDS (0x5)
The AVR specific public JTAG instruction for entering programming commands via the JTAG port. The 15-
bit Programming Command Register is selected as data register. The active states are the following:
• Capture-DR: the result of the previous command is loaded into the data register.
• Shift-DR: the data register is shifted by the TCK input, shifting out the result of the previous
command and shifting in the new command.
• Update-DR: the programming command is applied to the Flash inputs.
• Run-Test/Idle: one clock cycle is generated, executing the applied command.
29.10.5. PROG_PAGELOAD (0x6)
The AVR specific public JTAG instruction to directly load the Flash data page via the JTAG port. The
1024-bit Virtual Flash Page Load Register is selected as data register. This is a virtual scan chain with
length equal to the number of bits in one Flash page. Internally the Shift Register is 8-bit. Unlike most
JTAG instructions, the Update-DR state is not used to transfer data from the Shift Register. The data are
automatically transferred to the Flash page buffer byte by byte in the Shift-DR state by an internal state
machine. This is the only active state:
• Shift-DR: Flash page data are shifted in from TDI by the TCK input, and automatically loaded into
the Flash page one byte at a time.
Note: 1. The JTAG instruction PROG_PAGELOAD can only be used if the AVR device is the first device
in JTAG scan chain. If the AVR cannot be the first device in the scan chain, the byte-wise programming
algorithm must be used.
29.10.6. PROG_PAGEREAD (0x7)
The AVR specific public JTAG instruction to read one full Flash data page via the JTAG port. The 1032-bit
Virtual Flash Page Read Register is selected as data register. This is a virtual scan chain with length
equal to the number of bits in one Flash page plus 8. Internally the Shift Register is 8-bit. Unlike most
JTAG instructions, the Capture-DR state is not used to transfer data to the Shift Register. The data are
automatically transferred from the Flash page buffer byte by byte in the Shift-DR state by an internal state
machine. This is the only active state:
• Shift-DR: Flash data are automatically read one byte at a time and shifted out on TDO by the TCK
input. The TDI input is ignored.
Note: 1. The JTAG instruction PROG_PAGEREAD can only be used if the AVR device is the first device
in JTAG scan chain. If the AVR cannot be the first device in the scan chain, the byte-wise programming
algorithm must be used.
Atmel ATmega32A [DATASHEET]
Atmel-8155I-ATmega32A_Datasheet_Complete-08/2016
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