Datasheet

Figure 24-18. Formats and States in the Slave Transmitter Mode
S SLA R A DATA A
$A8 $B8
A
$B0
Reception of the o wn
sla v e address and one or
more data b ytes
Last data b yte tr ansmitted.
Switched to not addressed
slave (TWEA = '0')
Arbitration lost as master
and addressed as sla v e
n
From master to sla v e
From slave to master
Any number of data b ytes
and their associated ac kno wledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Ser ial Bus. The
prescaler bits are z ero or mask ed to z ero
P or SDATA
$C0
DATA A
A
$C8
P or SAll 1's
A
24.6.6. Miscellaneous States
There are two status codes that do not correspond to a defined TWI state, see the table below.
Status 0xF8 indicates that no relevant information is available because the TWINT Flag is not set. This
occurs between other states, and when the TWI is not involved in a serial transfer.
Status 0x00 indicates that a bus error has occurred during a Two-wire Serial Bus transfer. A bus error
occurs when a START or STOP condition occurs at an illegal position in the format frame. Examples of
such illegal positions are during the serial transfer of an address byte, a data byte, or an acknowledge bit.
When a bus error occurs, TWINT is set. To recover from a bus error, the TWSTO Flag must set and
TWINT must be cleared by writing a logic one to it. This causes the TWI to enter the not addressed Slave
mode and to clear the TWSTO Flag (no other bits in TWCR are affected). The SDA and SCL lines are
released, and no STOP condition is transmitted.
Table 24-7. Miscellaneous States
Status
Code
(TWSR)
Prescaler
Bits are 0
Status of the 2-wire Serial
Bus and 2-wire Serial
Interface Hardware
Application Software Response Next Action Taken by TWI Hardware
To/from TWDR To TWCR
STA STO TWI
NT
TWE
A
0xF8 No relevant state
information available;
TWINT = “0”
No TWDR action No TWCR action Wait or proceed current transfer
0x00 Bus error due to an illegal
START or STOP condition
No TWDR action 0 1 1 X Only the internal hardware is affected, no STOP
condition is sent on the bus. In all cases, the bus
is released and TWSTO is cleared.
24.6.7. Combining Several TWI Modes
In some cases, several TWI modes must be combined in order to complete the desired action. Consider
for example reading data from a serial EEPROM. Typically, such a transfer involves the following steps:
Atmel ATmega32A [DATASHEET]
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