Datasheet

19.11.9. ICR1L – Input Capture Register 1 Low byte
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses.
Name: ICR1L
Offset: 0x26
Reset: 0x00
Property: When addressing I/O Registers as data space the offset address is 0x46
Bit 7 6 5 4 3 2 1 0
ICR1L[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – ICR1L[7:0]: Input Capture 1 Low byte
The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the ICP1 pin
(or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture can be used for
defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers.
Refer to Accessing 16.bit Registers for details.
Atmel ATmega32A [DATASHEET]
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