Datasheet

If Timer/Counter2 is enabled, it will keep running during sleep. The device can wake-up from either timer

overflow or output compare event from Timer/Counter2 if the corresponding Timer/Counter2 interrupt

enable bits are set in TIMSK2, and the global interrupt enable bit in SREG is set.

If the PTC is enabled, the main clock is kept running.

If Timer/Counter2 is not running, the Power-Down mode is recommended instead of the Power-Save

mode.

The Timer/Counter2 can be clocked both synchronously and asynchronously in Power-Save mode. If

Timer/Counter2 is not using the asynchronous clock, the Timer/Counter oscillator is stopped during sleep.

If Timer/Counter2 is not using the synchronous clock, the clock source is stopped during sleep. Even if

the synchronous clock is running in power-save, this clock is only available for Timer/Counter2.

13.8 Standby Mode

When the SM[2:0] bits are written to '110' and an external crystal/resonator clock option is selected, the

SLEEP instruction makes the MCU enter Standby mode. This mode is identical to the Power-Down mode

with the exception that the oscillator is kept running. From Standby mode, the device wakes up in six

clock cycles.

13.9 Extended Standby Mode

When the SM[2:0] bits are written to '111' and an external crystal/resonator clock option is selected, the

SLEEP instruction makes the MCU enter Extended Standby mode. This mode is identical to Power-Save

mode with the exception that the Oscillator is kept running. From Extended Standby mode, the device

wakes up in six clock cycles.

13.10 Power Reduction Registers

The Power Reduction Registers (PRR1 and PRR0) provides a method to stop the clock to individual

peripherals to reduce power consumption. The current state of the peripheral is frozen and the I/O

registers cannot be read or written. Resources used by the peripheral when stopping the clock will remain

occupied, hence the peripheral should in most cases be disabled before stopping the clock. Waking up a

module, which is done by clearing the corresponding bit in the PRR, puts the module in the same state as

before shutdown.

Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall power

consumption. In all other sleep modes, the clock is already stopped.

13.11 Minimizing Power Consumption

There are several possibilities to consider when trying to minimize the power consumption in an AVR

controlled system. In general, sleep modes should be used as much as possible, and the sleep mode

should be selected so that as few as possible of the device’s functions are operating. All functions not

needed should be disabled. In particular, the following modules may need special consideration when

trying to achieve the lowest possible power consumption.

ATmega328PB

Power Management and Sleep Modes

Datasheet Complete

DS40001906C-page 66