Datasheet
13. Power Management and Sleep Modes
13.1 Overview
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving power.
The device provides various sleep modes allowing the user to tailor the power consumption to the
application requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during the
sleep periods. To further save power, it is possible to disable the BOD in some sleep modes. See also
BOD Disable.
13.2 Sleep Modes
The following table shows the different sleep modes, BOD disable ability, and their wake-up sources.
Table 13-1. Active Clock Domains and Wake-Up Sources in the Different Sleep Modes
Sleep Mode
Active Clock Domains Oscillators Wake-Up Sources
Software
BOD Disable
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
ASY
clk
PTC
Main Clock
Source Enabled
Timer Oscillator
Enabled
INT and PCINT
TWI Address
Match
Timer2
SPM/EEPROM
Ready
ADC
WDT
USART
(4)
Other I/O
Idle Yes Yes Yes Yes Yes Yes
(2)
Yes Yes Yes Yes Yes Yes Yes Yes
ADC Noise
Reduction
Yes Yes Yes Yes Yes
(2)
Yes
(3)
Yes Yes
(2)
Yes Yes Yes Yes
Power-Down Yes
(3)
Yes Yes Yes Yes
Power-Save Yes Yes Yes
(5)
Yes
(2)
Yes
(3)
Yes Yes Yes Yes Yes
Standby
(1)
Yes Yes
(3)
Yes Yes Yes Yes
Extended Standby Yes
(2)
Yes Yes Yes
(2)
Yes
(3)
Yes Yes Yes Yes Yes
Note:
1. Only recommended with external crystal or resonator selected as the clock source.
2. If Timer/Counter2 is running in Asynchronous mode.
3. For INT1 and INT0, only level interrupt.
4. Start frame detection only.
5. The main clock is kept running if PTC is enabled.
To enter any of the six sleep modes, the sleep enable bit in the Sleep Mode Control Register (SMCR.SE)
must be written to '1' and a SLEEP instruction must be executed. Sleep Mode Select bits
(SMCR.SM[2:0]) select which sleep mode (Idle, ADC Noise Reduction, Power-Down, Power-Save,
Standby, or Extended Standby) will be activated by the SLEEP instruction.
Note: The block diagram in the section System Clock and Clock Options provides an overview over the
different clock systems in the device and their distribution. This figure is helpful in selecting an appropriate
Sleep mode.
ATmega328PB
Power Management and Sleep Modes
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 63