Datasheet

11.7 External Clock
To drive the device from an external clock source, EXTCLK should be driven as shown in the figure
below. To run the device on an external clock, the CKSEL Fuses must be programmed to '0000':
Table 11-14. External Clock Frequency
Frequency CKSEL[3:0]
0 - 20 MHz 0000
Figure 11-3. External Clock Drive Configuration
EXTERNAL
CLOCK
SIGNAL
EXTCLK
GND
When this clock source is selected, start-up times are determined by the SUT Fuses:
Table 11-15. Start-Up Times for the External Clock Selection - SUT
Power Conditions Start-Up Time from Power-Down
and Power-Save
Additional Delay from Reset
(V
CC
= 5.0V)
SUT[1:0]
BOD enabled 6CK 19CK 00
Fast rising power 6CK 19CK + 4.1 ms 01
Slowly rising power 6CK 19CK + 65 ms 10
Reserved 11
When applying an external clock, it is required to avoid sudden changes in the applied clock frequency to
ensure stable operation of the MCU. A variation in frequency of more than 2% from one clock cycle to the
next can lead to unpredictable behavior. If changes of more than 2% are required, ensure that the MCU is
kept in Reset during the changes.
The System Clock Prescaler can be used to implement run-time changes of the internal clock frequency
while still ensuring stable operation.
11.8 Clock Output Buffer
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT fuse has to
be programmed. This mode is suitable when the chip clock is used to drive other circuits on the system.
The clock also will be output during Reset, and the normal operation of I/O pin will be overridden when
the fuse is programmed. Any clock source, including the internal RC oscillator, can be selected when the
clock is output on CLKO. If the system clock prescaler is used, it is the divided system clock that is
output.
ATmega328PB
System Clock and Clock Options
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 54