Datasheet

11. System Clock and Clock Options
11.1 Clock Systems and Their Distribution
The following figure illustrates the principal clock systems in the device and their distribution. All the
clocks need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes. The clock systems are described in the
following sections.
The system clock frequency refers to the frequency generated from the system clock prescaler. All clock
outputs from the AVR clock control unit runs in the same frequency.
Figure 11-1. Clock Distribution
Asynchronous
Timer/Counter
ADC AVR CPU
Flash and
EEPROM
Watchdog
Timer
System Clock
Prescaler
Clock
Multiplexer
Timer/Counter
Oscillator
Watchdog
Oscillator
Calibrated Internal
RC OSC
External Clock
Crystal
Oscillator
XTAL1
XTAL2
clk
ASY
clk
CPU
Low-frequency
Crystal Oscillator
Reset Logic
AVR Clock
Control Unit
General I/O
Modules
RAM
clk
IO
clk
FLASH
clk
ADC
Watchdog clock
TOSC1 TOSC2
clk
SYS
Peripheral Touch
Controller
clk
PTC
Related Links
Power Management and Sleep Modes
11.1.1 CPU Clock – clk
CPU
The CPU clock is routed to parts of the system concerned with operation of the AVR core. Examples of
such modules are the general purpose register file, the Status register, and the data memory holding the
ATmega328PB
System Clock and Clock Options
© 2018 Microchip Technology Inc.
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