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only. The SPM instruction can access the entire Flash, including the BLS itself. The protection level for
the Boot Loader section can be selected by the Boot Loader Lock bits (Boot Lock bits 1).
31.4 Read-While-Write and No Read-While-Write Flash Sections
Whether the CPU supports Read-While-Write (RWW) or if the CPU is halted during a boot loader
software update is dependent on which address that is being programmed. In addition to the two sections
that are configurable by the BOOTSZ fuses as described above, the Flash is also divided into two fixed
sections; the RWW section and the No Read-While-Write (NRWW) section. The limit between the RWW
and NRWW sections is given in the Boot Loader Parameters section and Figure 31-2. The main
differences between the two sections are:
• When erasing or writing a page located inside the RWW section, the NRWW section can be read
during the operation
• When erasing or writing a page located inside the NRWW section, the CPU is halted during the
entire operation
The user software can never read any code that is located inside the RWW section during a boot loader
software operation. The syntax “Read-While-Write section” refers to which section that is being
programmed (erased or written), not which section that actually is being read during a boot loader
software update.
Related Links
Boot Loader Parameters
31.4.1 RWW – Read-While-Write Section
If a boot loader software update is programming a page inside the RWW section, it is possible to read
code from the Flash, but only code that is located in the NRWW section. During an on-going
programming, the software must ensure that the RWW section is never being read. If the user software is
trying to read code that is located inside the RWW section (i.e., by a call/jmp/lpm or an interrupt) during
programming, the software might end up in an unknown state. To avoid this, the interrupts should either
be disabled or moved to the boot loader section. The boot loader section is always located in the NRWW
section. The RWW Section Busy bit (RWWSB) in the Store Program Memory Control and Status Register
(SPMCSR) will be read as logical one as long as the RWW section is blocked for reading. After a
programming is completed, the RWWSB must be cleared by software before reading code located in the
RWW section. Refer to SPMCSR – Store Program Memory Control and Status Register in this chapter for
details on how to clear RWWSB.
31.4.2 NRWW – No Read-While-Write Section
The code located in the NRWW section can be read when the boot loader software is updating a page in
the RWW section. When the boot loader code updates the NRWW section, the CPU is halted during the
entire page erase or page write operation.
Table 31-1. Read-While-Write Features
Which Section does the Z-
pointer Address During the
Programming?
Which Section can be Read
During Programming?
CPU Halted? Read-While-Write
Supported?
RWW Section NRWW Section No Yes
NRWW Section None Yes No
ATmega328PB
BTLDR - Boot Loader Support – Read-While-Wri...
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