Datasheet

30.6.1 debugWire Data Register

Name: DWDR

Offset: 0x51 [ID-000004d0]

Reset: 0x00

Property: When addressing as I/O Register: address offset is 0x31

When addressing I/O registers as data space using LD and ST instructions, the provided offset must be

used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an

I/O address offset within 0x00 - 0x3F.

The device is a complex microcontroller with more peripheral units than can be supported within the 64

locations reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 in

SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.

Bit 7 6 5 4 3 2 1 0

DWDR[7:0]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bits 7:0 – DWDR[7:0] debugWire Data

The DWDR Register provides a communication channel from the running program in the MCU to the

debugger. This register is only accessible by the debugWIRE and can therefore not be used as a general

purpose register in the normal operations.

ATmega328PB

debugWIRE On-chip Debug System

Datasheet Complete

DS40001906C-page 366