Datasheet

Counter1 input capture interrupt. When written logic zero, no connection between the analog comparator
and the input capture function exists. To make the comparator trigger the Timer/Counter1 input capture
interrupt, the ICIE1 bit in the Timer Interrupt Mask Register (TIMSK1) must be set.
Bits 1:0 – ACIS [1:0] Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the analog comparator interrupt.
Table 27-2. ACIS[1:0] Settings
ACIS1 ACIS0 Interrupt Mode
0 0 Comparator interrupt on output toggle.
0 1 Reserved
1 0 Comparator interrupt on falling output edge.
1 1 Comparator interrupt on rising output edge.
When changing the ACIS1/ACIS0 bits, the analog comparator Interrupt must be disabled by clearing its
interrupt enable bit in the ACSR register. Otherwise, an interrupt can occur when the bits are changed.
ATmega328PB
AC - Analog Comparator
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Datasheet Complete
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