Datasheet

26.9.2 TWI Status Register n
Name: TWSR
Offset: 0xB9 + n*0x20 [n=0..1]
Reset: 0xF8
Property: -
Bit 7 6 5 4 3 2 1 0
TWS7 TWS6 TWS5 TWS4 TWS3 TWPS[1:0]
Access
R R R R R R/W R/W
Reset 1 1 1 1 1 0 0
Bits 3, 4, 5, 6, 7 – TWS TWI Status Bit
The TWS[7:3] reflect the status of the TWI logic and the two-wire Serial Bus. The different status codes
are described in Transmission Modes. Note that the value read from TWSR contains both the 5-bit status
value and the 2-bit prescaler value. The application designer should mask the prescaler bits to zero when
checking the Status bits. This makes status checking independent of prescaler setting. This approach is
used in this data sheet unless otherwise noted.
Bits 1:0 – TWPS[1:0] TWI Prescaler
These bits can be read and written, and control the bit rate prescaler.
Table 26-8. TWI Bit Rate Prescaler
TWPS[1:0] Prescaler Value
00 1
01 4
10 16
11 64
To calculate bit rates, refer to Bit Rate Generator Unit. The value of TWPS[1:0] is used in the equation.
ATmega328PB
TWI - Two-Wire Serial Interface
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 329