Datasheet

26.9.1 TWI n Bit Rate Register
Name: TWBR
Offset: 0xB8 + n*0x20 [n=0..1]
Reset: 0x00
Property: -
Bit 7 6 5 4 3 2 1 0
TWBR [7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – TWBR [7:0] TWI Bit Rate Register
TWBR selects the division factor for the bit rate generator. The bit rate generator is a frequency divider
which generates the SCL clock frequency in the Master modes.
ATmega328PB
TWI - Two-Wire Serial Interface
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 328