Datasheet

23.5.5 SPI Data Register 0
Name: SPDR0
Offset: 0x4E [ID-000004d0]
Reset: 0xXX
Property: When addressing as I/O Register: address offset is 0x2E
When addressing I/O registers as data space using LD and ST instructions, the provided offset must be
used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an
I/O address offset within 0x00 - 0x3F.
The device is a complex microcontroller with more peripheral units than can be supported within the 64
locations reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 in
SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Bit 7 6 5 4 3 2 1 0
SPID[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset x x x x x x x x
Bits 7:0 – SPID[7:0] SPI Data
The SPI Data register is a read/write register used for data transfer between the register file and the SPI
Shift register. Writing to the register initiates data transmission. Reading the register causes the Shift
register receive buffer to be read.
ATmega328PB
SPI – Serial Peripheral Interface
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 260