Datasheet

19.11.18 TC4 Counter Value Low and High byte

Name: TCNT4L and TCNT4H

Offset: 0xA4

Reset: 0x00

Property: -

The TCNT4L and TCNT4H register pair represents the 16-bit value, TCNT4. The low byte [7:0] (suffix L)

is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For

more details on reading and writing 16-bit registers, refer to Accessing 16-bit Timer/Counter Registers.

Bit 15 14 13 12 11 10 9 8

TCNT4[15:8]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bit 7 6 5 4 3 2 1 0

TCNT4[7:0]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bits 15:0 – TCNT4[15:0] Timer/Counter 4 Counter Value

The two Timer/Counter I/O locations (TCNT4H and TCNT4L, combined TCNT4) give direct access, both

for read and for write operations, to the Timer/Counter unit 16-bit counter. To ensure that both the high

and low bytes are read and written simultaneously when the CPU accesses these registers, the access is

performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all

the other 16-bit registers. Refer to Accessing 16-bit Timer/Counter Registers for details.

Modifying the counter (TCNT4) while the counter is running introduces a risk of missing a compare match

between TCNT4 and one of the OCR4x Registers.

Writing to the TCNT4 Register blocks (removes) the compare match on the following timer clock for all

compare units.