Datasheet

19.11.17 TC4 Control Register C

Name: TCCR4C

Offset: 0xA2

Reset: 0x00

Property: -

Bit 7 6 5 4 3 2 1 0

FOC4A FOC4B

Access

R/W R/W

Reset 0 0

Bits 6, 7 – FOC4 Force Output Compare for Channel B and A

The FOCA/FOCB bits are only active when the WGM4[3:0] bits specifies a non-PWM mode. When writing

a logical one to the FOC4A/FOC4B bit, an immediate compare match is forced on the Waveform

Generation unit. The OC4A/OC4B output is changed according to its COM4x[1:0] bits setting. Note that

the FOCA/FOCB bits are implemented as strobes. Therefore it is the value present in the COM4x[1:0] bits

that determine the effect of the forced compare.

A FOC4A/FOC4B strobe will not generate any interrupt nor will it clear the timer in Clear Timer on

Compare Match (CTC) mode using OCR4A as TOP. The FOC4A/FOC4B bits are always read as zero.

ATmega328PB

TC1, 3, 4 - 16-bit Timer/Counter1, 3, 4 with PWM

Datasheet Complete

DS40001906C-page 203